In electronic systems such as communications systems, computing systems, and control systems, various system elements must exchange information. Typically such systems use internal buses that employ a multiple access protocol. Such buses typically allow system elements to exchange information which is organised into data packets, allocating a portion of the capacity of the bus to each system element in some manner.
The various types of information that must be exchanged between system elements impose different constraints on the packet communication provided by the multiple access buses. Some have different bandwidth requirements, some vary in priority relative to each other. Some must be exchanged within a relatively short fixed time constraint to facilitate synchronous transmission, while others can tolerate the much longer variable delays associated with asynchronous transmission. The present invention provides a means for accommodating all of the types of signals noted above, on the same bus.